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Intel expands chip instruction sets
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Intel expands chip instruction sets

by Tom Sanders  on Sep 28, 2006
50 new instructions promise faster and more power efficient computing.
50 new instructions promise faster and more power efficient computing.

Intel is preparing to introduce a collection of 50 new chip instructions that will allow for a more efficient handling of specific tasks, the company revealed at the Intel Developer Forum in San Francicso.

"We're working with customers to understand the next evolution in the instruction set," said Pat Gelsinger, Intel's senior vice president of the Digital Enterprise Group.

"What are their emerging workloads and how can we enhance the instruction of the platform to embrace those new usage models and deliver a solution that handles the data sets?"

The new instruction will target applications such as high performance computing, media processing and pattern recognition, Gelsinger said. They form two groups, with the Streaming SIMD Extensions 4 (SSE4) addressing increased performance and greater energy efficiency for most applications. Intel also plans to add a set of Application Targeted Accelerators that will provide low latency, lower power fixed function capabilities for targeted applications.

"All of these are new emerging workloads that the platform and the instruction set needs to comprehend."

The instruction set is a collection of commands that a processor understands and is able to execute. Examples of instruction sets are the Intel Architecture 32 (IA-32), the Intel 64 which is used in 64-bits Xeon and Pentium processors and the Itanium processor's IA-64. AMD has its own instruction sets such as the 64-bits x86-64, which is fully compatible with Intel 64.

The upcoming additions to the existing set will be added to Intel's forthcoming 45 nanometre processors that are scheduled to come out in the coming two years. The chipmaker has published a whitepaper detailing the new additions and will provide additional details as the new instructions are proven in silicon.

The additions are the result of Intel's new "tick-tock model" that describes a new way for the chipmaker to cooperate with its partners in the IT industry, touted Gelsinger.

"We need to be more embracive and aggressive and change the way that we work with the industry in describing and setting the direction for instruction set directions," said Gelsinger.

Ticks and tocks in the world of semiconductors are used to indicate high and low voltages in a processor. A combination of the two makes up one chip cycle and the number of cycles per second determines a processor's clock speed.

For AMD to ensure that its processors can replace Intel's chip at any time, the company will have to copy Intel's instruction set. Intel disclosing these details at an earlier moment gives AMD additional time to copy the features.

"We see that we need to be much more open," Gelsinger said. "As a consequence, our competition will see those [instruction sets] sooner as well. We expect that that is the result, but the benefit that we're aiming for is the independent software vendor (ISV) community and how they can take advantage of it."
Copyright © 2009 v3.co.uk
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