Intel has released details of its next-generation “Knights Corner” processor – the first commercial implementation of its Many Integrated Cores (MIC) architecture for massively multi-core data processing.
Knights Corner will be supplied as a co-processor on a PCI-Express card, intended for use with traditional Xeon workstations. Hardware is scheduled for launch in 2012, but an early design, dubbed Knights Ferry, is already being trialled by several supercomputing laboratories, including SGI and the US National Center for Supercomputing Applications.
Knights Corner will compete with existing GPU-based approaches, such as Nvidia’s programmable Fermi architecture. Intel believes it will succeed thanks to a parallel programming model that’s almost identical to established x86 approaches.
“If you can program a Xeon, you can program this microprocessor,” announced Anthony Neal-Graves, general manager of Intel’s Many Integrated Core Computing division.
“You can use the same tools and the same compilers. That makes parallelism simpler for the end user. It provides a saving in terms of time and money, and allows programmers to be much more efficient in terms of what they do.”
Towards the “exascale era”
Knights Corner is a step towards Intel’s vision of reaching the “exascale era” by the end of the decade, in which computing performance will be measured in exaflops – one exaflop being 1,000,000,000,000,000,000 floating point operations per second.
“It’s a real challenge to scale up to that level of performance,” observed Michael Woodacre of SGI, speaking before the launch. “We’re looking at a 500x improvement in eight years. Even with Moore’s Law giving us more transistors, that’s only going to give us about 40x. So we’re really looking to MIC technology to get this additional order of magnitude performance improvement.”
The first Knights Corner hardware will be produced using a 22nm process, incorporating Intel's recently-announced Tri-Gate transistors.
This article originally appeared at pcpro.co.uk